Messages in this thread | ![/](/images/icornerl.gif) | | Date | Mon, 2 Dec 2019 15:00:59 +0100 | From | Peter Zijlstra <> | Subject | Re: [PATCH 1/6] perf x86: Infrastructure for exposing an Uncore unit to PMON mapping |
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On Tue, Nov 26, 2019 at 07:36:25PM +0300, roman.sudarikov@linux.intel.com wrote: > From: Roman Sudarikov <roman.sudarikov@linux.intel.com> > > Intel® Xeon® Scalable processor family (code name Skylake-SP) makes significant > changes in the integrated I/O (IIO) architecture. The new solution introduces > IIO stacks which are responsible for managing traffic between the PCIe domain > and the Mesh domain. Each IIO stack has its own PMON block and can handle either > DMI port, x16 PCIe root port, MCP-Link or various built-in accelerators. > IIO PMON blocks allow concurrent monitoring of I/O flows up to 4 x4 bifurcation > within each IIO stack. > > Software is supposed to program required perf counters within each IIO stack > and gather performance data. The tricky thing here is that IIO PMON reports data > per IIO stack but users have no idea what IIO stacks are - they only know devices > which are connected to the platform. > > Understanding IIO stack concept to find which IIO stack that particular IO device > is connected to, or to identify an IIO PMON block to program for monitoring > specific IIO stack assumes a lot of implicit knowledge about given Intel server > platform architecture. > > This patch set introduces: > An infrastructure for exposing an Uncore unit to Uncore PMON mapping through sysfs-backend > A new --iiostat mode in perf stat to provide I/O performance metrics per I/O device > > Current version supports a server line starting Intel® Xeon® Processor Scalable > Family and introduces mapping for IIO Uncore units only. > Other units can be added on demand. > > Usage example: > /sys/devices/uncore_<type>_<pmu_idx>/platform_mapping > > Each Uncore unit type, by its nature, can be mapped to its own context, for example: > CHA - each uncore_cha_<pmu_idx> is assigned to manage a distinct slice of LLC capacity > UPI - each uncore_upi_<pmu_idx> is assigned to manage one link of Intel UPI Subsystem > IIO - each uncore_iio_<pmu_idx> is assigned to manage one stack of the IIO module > IMC - each uncore_imc_<pmu_idx> is assigned to manage one channel of Memory Controller > > Implementation details: > Two callbacks added to struct intel_uncore_type to discover and map Uncore units to PMONs: > int (*get_topology)(struct intel_uncore_type *type) > int (*set_mapping)(struct intel_uncore_type *type) > > IIO stack to PMON mapping is exposed through > /sys/devices/uncore_iio_<pmu_idx>/platform_mapping > in the following format: domain:bus > > Details of IIO Uncore unit mapping to IIO PMON: > Each IIO stack is either a DMI port, x16 PCIe root port, MCP-Link or various > built-in accelerators. For Uncore IIO Unit type, the platform_mapping file > holds bus numbers of devices, which can be monitored by that IIO PMON block > on each die. > > For example, on a 4-die Intel Xeon® server platform: > $ cat /sys/devices/uncore_iio_0/platform_mapping > 0000:00,0000:40,0000:80,0000:c0 > > Which means: > IIO PMON block 0 on die 0 belongs to IIO stack located on bus 0x00, domain 0x0000 > IIO PMON block 0 on die 1 belongs to IIO stack located on bus 0x40, domain 0x0000 > IIO PMON block 0 on die 2 belongs to IIO stack located on bus 0x80, domain 0x0000 > IIO PMON block 0 on die 3 belongs to IIO stack located on bus 0xc0, domain 0x0000 > > Signed-off-by: Roman Sudarikov <roman.sudarikov@linux.intel.com> > Co-developed-by: Alexander Antonov <alexander.antonov@intel.com> > Signed-off-by: Alexander Antonov <alexander.antonov@intel.com>
Kan, can you help these people? There's a ton of process fail with this submission. From SoB chain to CodingStyle to git-sendmail threading.
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