Messages in this thread | | | From | David Laight <> | Subject | RE: [PATCH v10 6/6] x86/split_lock: Enable split lock detection by kernel parameter | Date | Thu, 12 Dec 2019 16:23:25 +0000 |
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From: Andy Lutomirski > Sent: 12 December 2019 16:02 ... > MFENCE also implies LFENCE, and LFENCE is fairly slow despite having no architectural semantics other than blocking speculative > execution. AFAICT, in the absence of side channels timing oddities, there is no code whatsoever that would be correct with LFENCE > but incorrect without it. “Serialization” is, to some extent, a weaker example of this — MOV to CR2 is *much* slower than MFENCE or > LOCK despite the fact that, as far as the memory model is concerned, it doesn’t do a whole lot more.
IIRC LFENCE does affect things when you are mixing non-temporal and/or write-combining memory accesses.
I also thought there was a case where you needed to stop the speculative reads. But can't remember why.
David
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