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SubjectRe: [PATCH V2] ARM: imx: Enable ARM_ERRATA_814220 for i.MX6UL and i.MX7D
On Wed, Dec 11, 2019 at 10:53:36AM +0800, Anson Huang wrote:
> ARM_ERRATA_814220 has below description:
>
> The v7 ARM states that all cache and branch predictor maintenance
> operations that do not specify an address execute, relative to
> each other, in program order.
> However, because of this erratum, an L2 set/way cache maintenance
> operation can overtake an L1 set/way cache maintenance operation.
> This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
> r0p4, r0p5.
>
> i.MX6UL and i.MX7D have Cortex-A7 r0p5 inside, need to enable
> ARM_ERRATA_814220 for proper workaround.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Applied, thanks.

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