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    Subject[PATCH 4.4 51/75] ARM: spectre-v1: add array_index_mask_nospec() implementation
    Date
    From: Russell King <rmk+kernel@armlinux.org.uk>

    Commit 1d4238c56f9816ce0f9c8dbe42d7f2ad81cb6613 upstream.

    Add an implementation of the array_index_mask_nospec() function for
    mitigating Spectre variant 1 throughout the kernel.

    Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
    Acked-by: Mark Rutland <mark.rutland@arm.com>
    Boot-tested-by: Tony Lindgren <tony@atomide.com>
    Reviewed-by: Tony Lindgren <tony@atomide.com>
    Signed-off-by: David A. Long <dave.long@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/arm/include/asm/barrier.h | 21 +++++++++++++++++++++
    1 file changed, 21 insertions(+)

    --- a/arch/arm/include/asm/barrier.h
    +++ b/arch/arm/include/asm/barrier.h
    @@ -108,5 +108,26 @@ do { \
    #define smp_mb__before_atomic() smp_mb()
    #define smp_mb__after_atomic() smp_mb()

    +#ifdef CONFIG_CPU_SPECTRE
    +static inline unsigned long array_index_mask_nospec(unsigned long idx,
    + unsigned long sz)
    +{
    + unsigned long mask;
    +
    + asm volatile(
    + "cmp %1, %2\n"
    + " sbc %0, %1, %1\n"
    + CSDB
    + : "=r" (mask)
    + : "r" (idx), "Ir" (sz)
    + : "cc");
    +
    + return mask;
    +}
    +#define array_index_mask_nospec array_index_mask_nospec
    +#endif
    +
    +#include <asm-generic/barrier.h>
    +
    #endif /* !__ASSEMBLY__ */
    #endif /* __ASM_BARRIER_H */

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