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    Subject[PATCH 2/4] ARM: dts: bcm2711: Enable PCIe controller
    Date
    This enables bcm2711's PCIe bus, wich is hardwired to a VIA Technologies
    XHCI USB 3.0 controller.

    Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
    ---
    arch/arm/boot/dts/bcm2711.dtsi | 47 ++++++++++++++++++++++++++++++++++
    1 file changed, 47 insertions(+)

    diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
    index a9d84e28f245..c7b2e7b57da6 100644
    --- a/arch/arm/boot/dts/bcm2711.dtsi
    +++ b/arch/arm/boot/dts/bcm2711.dtsi
    @@ -288,6 +288,53 @@
    arm,cpu-registers-not-fw-configured;
    };

    + scb {
    + compatible = "simple-bus";
    + #address-cells = <2>;
    + #size-cells = <1>;
    +
    + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
    + <0x6 0x00000000 0x6 0x00000000 0x40000000>;
    +
    + pcie_0: pcie@7d500000 {
    + compatible = "brcm,bcm2711-pcie";
    + reg = <0x0 0x7d500000 0x9310>;
    + msi-controller;
    + msi-parent = <&pcie_0>;
    + #address-cells = <3>;
    + #interrupt-cells = <1>;
    + #size-cells = <2>;
    + linux,pci-domain = <0>;
    + brcm,enable-ssc;
    + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
    + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
    + interrupt-names = "pcie", "msi";
    + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
    + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143
    + IRQ_TYPE_LEVEL_HIGH
    + 0 0 0 2 &gicv2 GIC_SPI 144
    + IRQ_TYPE_LEVEL_HIGH
    + 0 0 0 3 &gicv2 GIC_SPI 145
    + IRQ_TYPE_LEVEL_HIGH
    + 0 0 0 4 &gicv2 GIC_SPI 146
    + IRQ_TYPE_LEVEL_HIGH>;
    +
    + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
    + 0x0 0x04000000>;
    + /*
    + * The wrapper around the PCIe block has a bug
    + * preventing it from accessing beyond the first 3GB of
    + * memory. As the bus DMA mask is rounded up to the
    + * closest power of two of the dma-range size, we're
    + * forced to set the limit at 2GB. This can be
    + * harmlessly changed in the future once the DMA code
    + * handles non power of two DMA limits.
    + */
    + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
    + 0x0 0x80000000>;
    + };
    + };
    +
    cpus: cpus {
    #address-cells = <1>;
    #size-cells = <0>;
    --
    2.23.0
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