Messages in this thread | | | From | Andy Lutomirski <> | Date | Wed, 27 Nov 2019 21:23:44 -0800 | Subject | Re: [PATCH v2 2/3] x86/traps: Print non-canonical address on #GP |
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On Wed, Nov 27, 2019 at 12:27 PM Jann Horn <jannh@google.com> wrote: > > On Sun, Nov 24, 2019 at 12:08 AM Andy Lutomirski <luto@kernel.org> wrote: > > On Fri, Nov 15, 2019 at 11:17 AM Jann Horn <jannh@google.com> wrote: > > > A frequent cause of #GP exceptions are memory accesses to non-canonical > > > addresses. Unlike #PF, #GP doesn't come with a fault address in CR2, so > > > the kernel doesn't currently print the fault address for #GP. > > > Luckily, we already have the necessary infrastructure for decoding X86 > > > instructions and computing the memory address that is being accessed; > > > hook it up to the #GP handler so that we can figure out whether the #GP > > > looks like it was caused by a non-canonical address, and if so, print > > > that address. > [...] > > > +static void print_kernel_gp_address(struct pt_regs *regs) > > > +{ > > > +#ifdef CONFIG_X86_64 > > > + u8 insn_bytes[MAX_INSN_SIZE]; > > > + struct insn insn; > > > + unsigned long addr_ref; > > > + > > > + if (probe_kernel_read(insn_bytes, (void *)regs->ip, MAX_INSN_SIZE)) > > > + return; > > > + > > > + kernel_insn_init(&insn, insn_bytes, MAX_INSN_SIZE); > > > + insn_get_modrm(&insn); > > > + insn_get_sib(&insn); > > > + addr_ref = (unsigned long)insn_get_addr_ref(&insn, regs); > [...] > > > +} > > > > Could you refactor this a little bit so that we end up with a helper > > that does the computation? Something like: > > > > int probe_insn_get_memory_ref(void **addr, size_t *len, void *insn_addr); > > > > returns 1 if there was a memory operand and fills in addr and len, > > returns 0 if there was no memory operand, and returns a negative error > > on error. > > > > I think we're going to want this for #AC handling, too :) > > Mmmh... the instruction decoder doesn't currently give us a reliable > access size though. (I know, I'm using it here regardless, but it > doesn't really matter here if the decoded size is too big from time to > time... whereas I imagine that that'd matter quite a bit for #AC > handling.) IIRC e.g. a MOVZX that loads 1 byte into a 4-byte register > is decoded as having .opnd_bytes==4; and if you look through > arch/x86/lib/insn.c, there isn't even anything that would ever set > ->opnd_bytes to 1. You'd have to add some plumbing to get reliable > access sizes. I don't want to add a helper for this before the > underlying infrastructure actually works properly.
Fair enough. Although, with #AC, we know a priori that the address is unaligned, so we could at least print "Unaligned access at 0x%lx\n". But we can certainly leave these details to someone else.
(For context, there are patches floating around to enable a formerly secret CPU feature to generate #AC on a LOCK instruction that spans a cache line.)
--Andy
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