Messages in this thread | | | Date | Thu, 28 Nov 2019 11:06:57 +0100 | From | Oliver Graute <> | Subject | Re: [PATCH] arm64: defconfig: Change CONFIG_AT803X_PHY from m to y |
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On 27/11/19, Fabio Estevam wrote: > Hi Oliver, > > On Wed, Nov 27, 2019 at 9:47 AM Oliver Graute <oliver.graute@gmail.com> wrote: > > > I'am using this DTS which I'am currently working on: > > > > https://lists.infradead.org/pipermail/linux-arm-kernel/2019-October/689501.html > > > > > > I bet one dollar that 6d4cd041f0af triggered a latent bug in the DTS. > > > > So what should I fix in my device tree? > > Some suggestions you could try: > > - Try to use phy-mode = "rgmii-id"; instead, > - The PHY address 0 does not match the reg value of 4, so you need to > double check the PHY address and make the @ and reg values to match.
ok I fix that in my dts.
> - If you have a GPIO connected to the Ethernet PHY reset pin, then you > should describe it in the dts and also provide a delay as per the > AR803X datasheet.
it seems that currently no ethernet phy reset gpio is connected on that advantech eval board. The vendor says there is a optional resistor which can be mounted.
Best regards,
Oliver
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