Messages in this thread | | | From | Clément Péron <> | Date | Thu, 21 Nov 2019 12:14:34 +0100 | Subject | Re: [PATCH v7 4/8] pwm: sun4i: Add an optional probe for bus clock |
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Hi Uwe,
On Thu, 21 Nov 2019 at 08:28, Uwe Kleine-König <u.kleine-koenig@pengutronix.de> wrote: > > Hello Clément, > > On Tue, Nov 19, 2019 at 06:53:15PM +0100, Clément Péron wrote: > > + /* > > + * We're keeping the bus clock on for the sake of simplicity. > > + * Actually it only needs to be on for hardware register accesses. > > + */ > > + ret = clk_prepare_enable(pwm->bus_clk); > > + if (ret) { > > + dev_err(&pdev->dev, "Cannot prepare and enable bus_clk\n"); > > Maybe add the error code to the message?
Ok I will change it for the reset control deassert if you agree.
Clement
> > Best regards > Uwe > > -- > Pengutronix e.K. | Uwe Kleine-König | > Industrial Linux Solutions | https://www.pengutronix.de/ |
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