| Date | Tue, 12 Nov 2019 11:38:54 +0100 (CET) | From | Thomas Gleixner <> | Subject | Re: [PATCH 01/12] riscv: abstract out CSR names for supervisor vs machine mode |
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On Mon, 28 Oct 2019, Christoph Hellwig wrote:
> Many of the privileged CSRs exist in a supervisor and machine version > that are used very similarly. Provide versions of the CSR names and > fields that map to either the S-mode or M-mode variant depending on > a new CONFIG_RISCV_M_MODE kconfig symbol. > > Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com> > and Paul Walmsley <paul.walmsley@sifive.com>. > > Signed-off-by: Christoph Hellwig <hch@lst.de>
For those:
> drivers/clocksource/timer-riscv.c | 8 ++-- > drivers/irqchip/irq-sifive-plic.c | 11 +++--
Acked-by: Thomas Gleixner <tglx@linutronix.de>
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