Messages in this thread | | | Date | Sun, 10 Nov 2019 14:53:12 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH 02/12] irqchip: Add Aspeed SCU interrupt controller |
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On Fri, 8 Nov 2019 14:18:23 -0600 Eddie James <eajames@linux.ibm.com> wrote:
Hi Eddie,
> The Aspeed SOCs provide some interrupts through the System Control > Unit registers. Add an interrupt controller that provides these > interrupts to the system. > > Signed-off-by: Eddie James <eajames@linux.ibm.com> > --- > MAINTAINERS | 1 + > drivers/irqchip/Makefile | 2 +- > drivers/irqchip/irq-aspeed-scu-ic.c | 233 ++++++++++++++++++++++++++++++++++++ > 3 files changed, 235 insertions(+), 1 deletion(-) > create mode 100644 drivers/irqchip/irq-aspeed-scu-ic.c
[...]
> +static int aspeed_scu_ic_map(struct irq_domain *domain, unsigned int irq, > + irq_hw_number_t hwirq) > +{ > + irq_set_chip_and_handler(irq, &aspeed_scu_ic_chip, handle_simple_irq);
handle_simple_irq is usually wrong, and works badly with threaded interrupts. I suggest you'd change it to handle_level_irq, which probably matches the behaviour of the controller.
Otherwise, this looks good.
Thanks,
M. -- Jazz is not dead. It just smells funny...
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