Messages in this thread | | | Date | Wed, 9 Oct 2019 10:02:40 +0200 | From | Pavel Machek <> | Subject | Re: x86/random: Speculation to the rescue |
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Hi!
> > I have many systems including SoC here, but technology needed for NAND > > flash is different from technology for CPU, so these parts do _not_ > > share a silicon die. They do not even share same package. (Also RTC > > tends to be on separate chip, connected using i2c). > > NAND flash requires ECC so is likely to be async. > But I2C is clocked from the cpu end - so is fixed.
RTC i2c may be clocked from the CPU end, but the time source needs to work when machine is off, so that has a separate crystal for timekeeping.
> Also an embedded system could be booting off a large serial EEPROM. > These have fixed timings and are clocked from the cpu end.
Have you seen such system running Linux?
Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html [unhandled content-type:application/pgp-signature] | |