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    Subject[PATCH 5.3 165/197] arm64: Enable workaround for Cavium TX2 erratum 219 when running SMT
    Date
    From: Marc Zyngier <marc.zyngier@arm.com>

    commit 93916beb70143c46bf1d2bacf814be3a124b253b upstream.

    It appears that the only case where we need to apply the TX2_219_TVM
    mitigation is when the core is in SMT mode. So let's condition the
    enabling on detecting a CPU whose MPIDR_EL1.Aff0 is non-zero.

    Cc: <stable@vger.kernel.org>
    Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: Will Deacon <will@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm64/kernel/cpu_errata.c | 33 +++++++++++++++++++++++++++++++++
    1 file changed, 33 insertions(+)

    --- a/arch/arm64/kernel/cpu_errata.c
    +++ b/arch/arm64/kernel/cpu_errata.c
    @@ -12,6 +12,7 @@
    #include <asm/cpu.h>
    #include <asm/cputype.h>
    #include <asm/cpufeature.h>
    +#include <asm/smp_plat.h>

    static bool __maybe_unused
    is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)
    @@ -623,6 +624,30 @@ check_branch_predictor(const struct arm6
    return (need_wa > 0);
    }

    +static const __maybe_unused struct midr_range tx2_family_cpus[] = {
    + MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
    + MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),
    + {},
    +};
    +
    +static bool __maybe_unused
    +needs_tx2_tvm_workaround(const struct arm64_cpu_capabilities *entry,
    + int scope)
    +{
    + int i;
    +
    + if (!is_affected_midr_range_list(entry, scope) ||
    + !is_hyp_mode_available())
    + return false;
    +
    + for_each_possible_cpu(i) {
    + if (MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0) != 0)
    + return true;
    + }
    +
    + return false;
    +}
    +
    #ifdef CONFIG_HARDEN_EL2_VECTORS

    static const struct midr_range arm64_harden_el2_vectors[] = {
    @@ -857,6 +882,14 @@ const struct arm64_cpu_capabilities arm6
    ERRATA_MIDR_RANGE_LIST(tx2_family_cpus),
    },
    #endif
    +#ifdef CONFIG_CAVIUM_TX2_ERRATUM_219
    + {
    + .desc = "Cavium ThunderX2 erratum 219 (KVM guest sysreg trapping)",
    + .capability = ARM64_WORKAROUND_CAVIUM_TX2_219_TVM,
    + ERRATA_MIDR_RANGE_LIST(tx2_family_cpus),
    + .matches = needs_tx2_tvm_workaround,
    + },
    +#endif
    {
    }
    };

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