Messages in this thread Patch in this message | | | From | Zhou Yanjie <> | Subject | [PATCH 1/2] MIPS: Rename JZRISC to XBurst. | Date | Thu, 24 Oct 2019 17:29:00 +0800 |
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Now in addition to the JZ line, Ingenic has added three product lines X, T and M. and the real name of the CPU from Ingenic is XBurst, not JZRISC.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> --- arch/mips/kernel/cpu-probe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index c2eb392..16033a4 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1951,7 +1951,7 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) case PRID_IMP_XBURST: c->cputype = CPU_XBURST; c->writecombine = _CACHE_UNCACHED_ACCELERATED; - __cpu_name[cpu] = "Ingenic JZRISC"; + __cpu_name[cpu] = "Ingenic XBurst"; /* * The XBurst core by default attempts to avoid branch target * buffer lookups by detecting & special casing loops. This -- 2.7.4
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