Messages in this thread | | | From | Leonard Crestez <> | Subject | Re: [PATCH v4] arm64: dts: imx8mq: Init rates and parents configs for clocks | Date | Wed, 23 Oct 2019 08:38:36 +0000 |
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On 2019-10-23 9:29 AM, Viorel Suman wrote: > On Mi, 2019-08-21 at 20:39 +0000, Leonard Crestez wrote: >> The audio PLLs should run below 650 mHz so please use 393216000 and >> 361267200 instead of 786432000 and 722534400. For the 8mm equivalent see >> commit 053a4ffe2988 ("clk: imx: imx8mm: fix audio pll setting"). > > Hi Leonard, > > Audio PLL IP on 8mm and 8mn is different than the Audio PLL IP on 8mq, > so the requirement to run below 650 MHZ may not apply to 8mq.
This "max 650mHz" limit is from internal ADD and is also mentioned for imx8mq.
Peng: you made the change in our internal tree, can you confirm this requirement also applies to 8mq?
Viorel: Is there any impact from 393216000 vs 786432000 on PLL on audio? As far as I can know this rate goes through various dividers anyway.
-- Regards, Leonard
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