Messages in this thread | | | Subject | Re: [PATCH v1 2/6] clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998 | From | Jeffrey Hugo <> | Date | Wed, 9 Jan 2019 12:28:44 -0700 |
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On 1/9/2019 11:59 AM, Stephen Boyd wrote: > Quoting Jeffrey Hugo (2019-01-04 08:50:15) >> The gcc_usb3_phy_pipe_clk is generated by the phy, but is also used by >> the phy during init. The clock needs to be enabled during the init >> sequence, but may not be fully active until after the init sequence is >> complete. This causes a catch-22 if the clock status is checked during >> enable. As a result, skip the checks to avoid the troubling situation. > > I will ask again, is anyone going to fix this in the phy driver? In > theory it isn't needed if the phy driver can do things differently, but > last time I checked I was told that the phy team said it had to be done > this way. >
Interesting. I was unaware of past discussion(s) on this. Thank you for taking the change, but I'll try having a look to see if maybe I can prove your theory going forward.
-- Jeffrey Hugo Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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