Messages in this thread | | | Subject | Re: [PATCH] clk: qcom: Add CLK_SET_RATE_PARENT for 8998 branch clocks | From | Stephen Boyd <> | Date | Wed, 09 Jan 2019 10:59:12 -0800 |
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Quoting Jeffrey Hugo (2018-12-17 18:12:14) > A branch clock is basically a clock that can be gated for power savings, > but is also what devices/drivers consume. Configuring a branch clock's > rate needs to be done at the source, so for all branch clocks which have > a defined parent, set CLK_SET_RATE_PARENT so that clk_set_rate() calls on > branch clocks can do what is expected. This is important as most drivers > do not check the resulting clock rate after a successful clk_set_rate() > call, thus the driver may get out of sync with the actual hardware state > and weird issues might crop up. This has been observed with issues > getting SDHCI to reliably support "fast" cards such as SDR104. > > Fixes: 4807c71cc688 (arm64: dts: Add msm8998 SoC and MTP board support) > Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> > ---
Applied to clk-next
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