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    Subject[PATCH 08/14] clk: meson: merge phase driver and remove from clkc
    Date
    Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
    ---
    drivers/clk/meson/Makefile | 2 +-
    drivers/clk/meson/axg-audio.c | 2 +
    drivers/clk/meson/clk-phase.c | 75 +++++++++++++++++++++++++++++---
    drivers/clk/meson/clk-phase.h | 26 +++++++++++
    drivers/clk/meson/clk-triphase.c | 68 -----------------------------
    drivers/clk/meson/clkc-audio.h | 7 ---
    drivers/clk/meson/clkc.h | 8 ----
    7 files changed, 99 insertions(+), 89 deletions(-)
    create mode 100644 drivers/clk/meson/clk-phase.h
    delete mode 100644 drivers/clk/meson/clk-triphase.c

    diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile
    index 8234e92eea38..2b9490dd9878 100644
    --- a/drivers/clk/meson/Makefile
    +++ b/drivers/clk/meson/Makefile
    @@ -4,7 +4,7 @@

    obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-mpll.o clk-phase.o vid-pll-div.o
    obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-input.o clk-dualdiv.o
    -obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += clk-triphase.o sclk-div.o
    +obj-$(CONFIG_COMMON_CLK_AMLOGIC_AUDIO) += sclk-div.o
    obj-$(CONFIG_COMMON_CLK_MESON_AO) += meson-aoclk.o
    obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o
    obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o
    diff --git a/drivers/clk/meson/axg-audio.c b/drivers/clk/meson/axg-audio.c
    index 8ac3a2295473..45d2abc3351f 100644
    --- a/drivers/clk/meson/axg-audio.c
    +++ b/drivers/clk/meson/axg-audio.c
    @@ -16,6 +16,8 @@

    #include "clkc-audio.h"
    #include "axg-audio.h"
    +#include "clk-regmap.h"
    +#include "clk-phase.h"

    #define AXG_MST_IN_COUNT 8
    #define AXG_SLV_SCLK_COUNT 10
    diff --git a/drivers/clk/meson/clk-phase.c b/drivers/clk/meson/clk-phase.c
    index cba43748ce3d..80c3ada193a4 100644
    --- a/drivers/clk/meson/clk-phase.c
    +++ b/drivers/clk/meson/clk-phase.c
    @@ -5,7 +5,10 @@
    */

    #include <linux/clk-provider.h>
    -#include "clkc.h"
    +#include <linux/module.h>
    +
    +#include "clk-regmap.h"
    +#include "clk-phase.h"

    #define phase_step(_width) (360 / (1 << (_width)))

    @@ -15,13 +18,12 @@ meson_clk_phase_data(struct clk_regmap *clk)
    return (struct meson_clk_phase_data *)clk->data;
    }

    -int meson_clk_degrees_from_val(unsigned int val, unsigned int width)
    +static int meson_clk_degrees_from_val(unsigned int val, unsigned int width)
    {
    return phase_step(width) * val;
    }
    -EXPORT_SYMBOL_GPL(meson_clk_degrees_from_val);

    -unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width)
    +static unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width)
    {
    unsigned int val = DIV_ROUND_CLOSEST(degrees, phase_step(width));

    @@ -31,7 +33,6 @@ unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width)
    */
    return val % (1 << width);
    }
    -EXPORT_SYMBOL_GPL(meson_clk_degrees_to_val);

    static int meson_clk_phase_get_phase(struct clk_hw *hw)
    {
    @@ -61,3 +62,67 @@ const struct clk_ops meson_clk_phase_ops = {
    .set_phase = meson_clk_phase_set_phase,
    };
    EXPORT_SYMBOL_GPL(meson_clk_phase_ops);
    +
    +/*
    + * This is a special clock for the audio controller.
    + * The phase of mst_sclk clock output can be controlled independently
    + * for the outside world (ph0), the tdmout (ph1) and tdmin (ph2).
    + * Controlling these 3 phases as just one makes things simpler and
    + * give the same clock view to all the element on the i2s bus.
    + * If necessary, we can still control the phase in the tdm block
    + * which makes these independent control redundant.
    + */
    +static inline struct meson_clk_triphase_data *
    +meson_clk_triphase_data(struct clk_regmap *clk)
    +{
    + return (struct meson_clk_triphase_data *)clk->data;
    +}
    +
    +static void meson_clk_triphase_sync(struct clk_hw *hw)
    +{
    + struct clk_regmap *clk = to_clk_regmap(hw);
    + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    + unsigned int val;
    +
    + /* Get phase 0 and sync it to phase 1 and 2 */
    + val = meson_parm_read(clk->map, &tph->ph0);
    + meson_parm_write(clk->map, &tph->ph1, val);
    + meson_parm_write(clk->map, &tph->ph2, val);
    +}
    +
    +static int meson_clk_triphase_get_phase(struct clk_hw *hw)
    +{
    + struct clk_regmap *clk = to_clk_regmap(hw);
    + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    + unsigned int val;
    +
    + /* Phase are in sync, reading phase 0 is enough */
    + val = meson_parm_read(clk->map, &tph->ph0);
    +
    + return meson_clk_degrees_from_val(val, tph->ph0.width);
    +}
    +
    +static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees)
    +{
    + struct clk_regmap *clk = to_clk_regmap(hw);
    + struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    + unsigned int val;
    +
    + val = meson_clk_degrees_to_val(degrees, tph->ph0.width);
    + meson_parm_write(clk->map, &tph->ph0, val);
    + meson_parm_write(clk->map, &tph->ph1, val);
    + meson_parm_write(clk->map, &tph->ph2, val);
    +
    + return 0;
    +}
    +
    +const struct clk_ops meson_clk_triphase_ops = {
    + .init = meson_clk_triphase_sync,
    + .get_phase = meson_clk_triphase_get_phase,
    + .set_phase = meson_clk_triphase_set_phase,
    +};
    +EXPORT_SYMBOL_GPL(meson_clk_triphase_ops);
    +
    +MODULE_DESCRIPTION("Amlogic phase driver");
    +MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
    +MODULE_LICENSE("GPL v2");
    diff --git a/drivers/clk/meson/clk-phase.h b/drivers/clk/meson/clk-phase.h
    new file mode 100644
    index 000000000000..5579f9ced142
    --- /dev/null
    +++ b/drivers/clk/meson/clk-phase.h
    @@ -0,0 +1,26 @@
    +/* SPDX-License-Identifier: GPL-2.0 */
    +/*
    + * Copyright (c) 2019 BayLibre, SAS.
    + * Author: Jerome Brunet <jbrunet@baylibre.com>
    + */
    +
    +#ifndef __MESON_CLK_PHASE_H
    +#define __MESON_CLK_PHASE_H
    +
    +#include <linux/clk-provider.h>
    +#include "parm.h"
    +
    +struct meson_clk_phase_data {
    + struct parm ph;
    +};
    +
    +struct meson_clk_triphase_data {
    + struct parm ph0;
    + struct parm ph1;
    + struct parm ph2;
    +};
    +
    +extern const struct clk_ops meson_clk_phase_ops;
    +extern const struct clk_ops meson_clk_triphase_ops;
    +
    +#endif /* __MESON_CLK_PHASE_H */
    diff --git a/drivers/clk/meson/clk-triphase.c b/drivers/clk/meson/clk-triphase.c
    deleted file mode 100644
    index 4a59936251e5..000000000000
    --- a/drivers/clk/meson/clk-triphase.c
    +++ /dev/null
    @@ -1,68 +0,0 @@
    -// SPDX-License-Identifier: (GPL-2.0 OR MIT)
    -/*
    - * Copyright (c) 2018 BayLibre, SAS.
    - * Author: Jerome Brunet <jbrunet@baylibre.com>
    - */
    -
    -#include <linux/clk-provider.h>
    -#include "clkc-audio.h"
    -
    -/*
    - * This is a special clock for the audio controller.
    - * The phase of mst_sclk clock output can be controlled independently
    - * for the outside world (ph0), the tdmout (ph1) and tdmin (ph2).
    - * Controlling these 3 phases as just one makes things simpler and
    - * give the same clock view to all the element on the i2s bus.
    - * If necessary, we can still control the phase in the tdm block
    - * which makes these independent control redundant.
    - */
    -static inline struct meson_clk_triphase_data *
    -meson_clk_triphase_data(struct clk_regmap *clk)
    -{
    - return (struct meson_clk_triphase_data *)clk->data;
    -}
    -
    -static void meson_clk_triphase_sync(struct clk_hw *hw)
    -{
    - struct clk_regmap *clk = to_clk_regmap(hw);
    - struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    - unsigned int val;
    -
    - /* Get phase 0 and sync it to phase 1 and 2 */
    - val = meson_parm_read(clk->map, &tph->ph0);
    - meson_parm_write(clk->map, &tph->ph1, val);
    - meson_parm_write(clk->map, &tph->ph2, val);
    -}
    -
    -static int meson_clk_triphase_get_phase(struct clk_hw *hw)
    -{
    - struct clk_regmap *clk = to_clk_regmap(hw);
    - struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    - unsigned int val;
    -
    - /* Phase are in sync, reading phase 0 is enough */
    - val = meson_parm_read(clk->map, &tph->ph0);
    -
    - return meson_clk_degrees_from_val(val, tph->ph0.width);
    -}
    -
    -static int meson_clk_triphase_set_phase(struct clk_hw *hw, int degrees)
    -{
    - struct clk_regmap *clk = to_clk_regmap(hw);
    - struct meson_clk_triphase_data *tph = meson_clk_triphase_data(clk);
    - unsigned int val;
    -
    - val = meson_clk_degrees_to_val(degrees, tph->ph0.width);
    - meson_parm_write(clk->map, &tph->ph0, val);
    - meson_parm_write(clk->map, &tph->ph1, val);
    - meson_parm_write(clk->map, &tph->ph2, val);
    -
    - return 0;
    -}
    -
    -const struct clk_ops meson_clk_triphase_ops = {
    - .init = meson_clk_triphase_sync,
    - .get_phase = meson_clk_triphase_get_phase,
    - .set_phase = meson_clk_triphase_set_phase,
    -};
    -EXPORT_SYMBOL_GPL(meson_clk_triphase_ops);
    diff --git a/drivers/clk/meson/clkc-audio.h b/drivers/clk/meson/clkc-audio.h
    index 0a7c157ebf81..8e1de2a72610 100644
    --- a/drivers/clk/meson/clkc-audio.h
    +++ b/drivers/clk/meson/clkc-audio.h
    @@ -9,12 +9,6 @@

    #include "clkc.h"

    -struct meson_clk_triphase_data {
    - struct parm ph0;
    - struct parm ph1;
    - struct parm ph2;
    -};
    -
    struct meson_sclk_div_data {
    struct parm div;
    struct parm hi;
    @@ -22,7 +16,6 @@ struct meson_sclk_div_data {
    struct clk_duty cached_duty;
    };

    -extern const struct clk_ops meson_clk_triphase_ops;
    extern const struct clk_ops meson_sclk_div_ops;

    #endif /* __MESON_CLKC_AUDIO_H */
    diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
    index 32947bd76bab..e8e4067bfcd5 100644
    --- a/drivers/clk/meson/clkc.h
    +++ b/drivers/clk/meson/clkc.h
    @@ -11,13 +11,6 @@
    #include "clk-regmap.h"
    #include "parm.h"

    -struct meson_clk_phase_data {
    - struct parm ph;
    -};
    -
    -int meson_clk_degrees_from_val(unsigned int val, unsigned int width);
    -unsigned int meson_clk_degrees_to_val(int degrees, unsigned int width);
    -
    struct meson_vid_pll_div_data {
    struct parm val;
    struct parm sel;
    @@ -42,7 +35,6 @@ struct meson_clk_dualdiv_data {

    /* clk_ops */
    extern const struct clk_ops meson_clk_cpu_ops;
    -extern const struct clk_ops meson_clk_phase_ops;
    extern const struct clk_ops meson_vid_pll_div_ro_ops;
    extern const struct clk_ops meson_clk_dualdiv_ops;
    extern const struct clk_ops meson_clk_dualdiv_ro_ops;
    --
    2.20.1
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      Last update: 2019-01-28 19:05    [W:2.656 / U:0.080 seconds]
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