Messages in this thread | | | Subject | Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer | From | Joseph Lo <> | Date | Mon, 28 Jan 2019 11:09:25 +0800 |
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On 1/25/19 8:01 PM, Jon Hunter wrote: > > On 25/01/2019 03:23, Joseph Lo wrote: >> Hi Jon, >> >> Thanks for reviewing. >> >> On 1/24/19 6:30 PM, Jon Hunter wrote: >>> >>> On 07/01/2019 03:28, Joseph Lo wrote: >>>> The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, >>>> or watchdog interrupts. >>>> >>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> >>>> Cc: Thomas Gleixner <tglx@linutronix.de> >>>> Cc: linux-kernel@vger.kernel.org >>>> Cc: devicetree@vger.kernel.org >>>> Signed-off-by: Joseph Lo <josephl@nvidia.com> >>>> --- >>>> .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ >>>> 1 file changed, 25 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> >>>> diff --git >>>> a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> new file mode 100644 >>>> index 000000000000..ba511220a669 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> @@ -0,0 +1,25 @@ >>>> +NVIDIA Tegra210 timer >>>> + >>>> +The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> +from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, >>>> periodic, >>>> +or watchdog interrupts. >>>> + >>>> +Required properties: >>>> +- compatible : "nvidia,tegra210-timer". >>>> +- reg : Specifies base physical address and size of the registers. >>>> +- interrupts : A list of 4 interrupts; one per each of TMR10 through >>>> TMR13. >>> [snip] >> And notice that only TMR10-TMR13 are running at the oscillator clock >> (clk_m). With the Tegra210 timer driver, we introduce in this series, >> which only replace the clock event device function that was originally >> owned by the arch timer (armv8 timer) and it also running at the >> oscillator clock. The sched_timer still owns by the arch timer. So the >> timer resolution will be the same. That's why we choose TMR10-TMR13 as >> the timer for Tegra210. > > That maybe fine, but DT should describe the hardware and so I don't see > why we would not list all the interrupts. We can still only use TMR10-13 > in the driver. >
Okay, will list all the interrupts for each timer channel.
Thanks, Joseph
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