Messages in this thread | | | Date | Fri, 25 Jan 2019 19:51:22 +0100 | From | Maxime Ripard <> | Subject | Re: [PATCH v6 16/22] arm64: dts: allwinner: a64: Add DSI pipeline |
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On Fri, Jan 25, 2019 at 01:28:54AM +0530, Jagan Teki wrote: > The A64 has a MIPI-DSI block which is similar to A31. > > Add dsi, dphy nodes with A31 fallback compatible and finally > connect the dsi node to tcon0 node to make proper DSI pipeline. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 47 +++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index cdc154b14a7e..e18d81aff813 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -358,6 +358,12 @@ > #address-cells = <1>; > #size-cells = <0>; > reg = <1>; > + > + tcon0_out_dsi: endpoint@1 { > + reg = <1>; > + remote-endpoint = <&dsi_in_tcon0>; > + allwinner,tcon-channel = <1>; > + }; > }; > }; > }; > @@ -935,6 +941,47 @@ > status = "disabled"; > }; > > + dsi: dsi@1ca0000 { > + compatible = "allwinner,sun50i-a64-mipi-dsi", > + "allwinner,sun6i-a31-mipi-dsi"; > + reg = <0x01ca0000 0x1000>; > + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_MIPI_DSI>, > + <&ccu CLK_DSI_DPHY>;
This one looks weird. There's only a single clock in the A64, and it seems to be for the D-PHY only.
And the rate is fixed at 148.5 MHz apparently, as opposed to the current code that is running at twice that speed.
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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