Messages in this thread | | | From | Shijith Thotton <> | Subject | Re: [Qestion] Softlockup when send IPI to other CPUs | Date | Fri, 25 Jan 2019 09:57:02 +0000 |
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On 01/24/2019 10:07 PM, Catalin Marinas wrote: > Hi Shijith, > > On Thu, Jan 24, 2019 at 07:00:42AM +0000, Shijith Thotton wrote: >> On 01/23/2019 11:45 PM, Catalin Marinas wrote: >>> diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c >>> index 30695a868107..5c9073bace83 100644 >>> --- a/arch/arm64/mm/flush.c >>> +++ b/arch/arm64/mm/flush.c >>> @@ -33,7 +33,11 @@ void sync_icache_aliases(void *kaddr, unsigned long len) >>> __clean_dcache_area_pou(kaddr, len); >>> __flush_icache_all(); >>> } else { >>> - flush_icache_range(addr, addr + len); >>> + /* >>> + * Don't issue kick_all_cpus_sync() after I-cache invalidation >>> + * for user mappings. >>> + */ >>> + __flush_icache_range(addr, addr + len); >>> } >>> } >> >> We also faced similar issue with LTP test migrate_pages03 in past and this patch >> fixes the issue. >> >> http://lists.infradead.org/pipermail/linux-arm-kernel/2019-January/623574.html > > Thanks for confirming. I presume I can add your tested-by. >
Sure.
Tested-by: Shijith Thotton <sthotton@marvell.com>
Shijith
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