Messages in this thread | | | From | Jim Mattson <> | Date | Wed, 2 Jan 2019 15:26:56 -0800 | Subject | Re: [PATCH v4 04/10] KVM/x86: intel_pmu_lbr_enable |
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On Wed, Dec 26, 2018 at 2:01 AM Wei Wang <wei.w.wang@intel.com> wrote: > > The lbr stack is architecturally specific, for example, SKX has 32 lbr > stack entries while HSW has 16 entries, so a HSW guest running on a SKX > machine may not get accurate perf results. Currently, we forbid the > guest lbr enabling when the guest and host see different lbr stack > entries.
How do you handle live migration?
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