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Subject[PATCH v3 0/2] Allwinner A64 timer workaround
This is the third version of a patch series to fix system clock jumps
and other timer instability on the Allwinner A64 SoC. It has now been
tested for a week, and I've received no reports of date jumps with this
version. So this is, as far as I can tell, a complete workaround.

See the commit messages for a detailed description of the issue, but the
summary is that, when a high counter bit rolls over, indeterminance in
the low bits causes CNTPCT/CNTVCT and their respective TVAL registers to
jump forward or backward. Backward jumps (or the next read after forward
jumps) are sometimes seen by the kernel and interpreted as the timer
wrapping around after 2^56 cycles. This causes the system clock to jump
forward approximately 91 years.

changes since v2;
- Reduced workaround threshold from 11 to 10 bits based on reports from
other hardare and the U-Boot version of this workaround
- Added TVAL handling based on Marc's suggestion
- Added erratum documentation and renamed symbols to match
- Added Maxime's Acked-by

changes since v1:
- Add an iteration limit like most other arch timer workarounds
- Added Andre's Tested-by

Samuel Holland (2):
arm64: arch_timer: Workaround for Allwinner A64 timer instability
arm64: dts: allwinner: a64: Enable A64 timer workaround

Documentation/arm64/silicon-errata.txt | 2 +
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
drivers/clocksource/Kconfig | 10 ++++
drivers/clocksource/arm_arch_timer.c | 55 +++++++++++++++++++
4 files changed, 68 insertions(+)


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