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    Subject[PATCH v7 3/8] gpio: 104-dio-48e: Utilize for_each_set_clump8 macro
    Date
    Replace verbose implementation in get_multiple/set_multiple callbacks
    with for_each_set_clump8 macro to simplify code and improve clarity.

    Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
    ---
    drivers/gpio/gpio-104-dio-48e.c | 71 ++++++++++-----------------------
    1 file changed, 20 insertions(+), 51 deletions(-)

    diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c
    index 92c8f944bf64..1093a1403d77 100644
    --- a/drivers/gpio/gpio-104-dio-48e.c
    +++ b/drivers/gpio/gpio-104-dio-48e.c
    @@ -183,46 +183,25 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset)
    return !!(port_state & mask);
    }

    +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
    +
    static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
    unsigned long *bits)
    {
    struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
    - size_t i;
    - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
    - const unsigned int gpio_reg_size = 8;
    - unsigned int bits_offset;
    - size_t word_index;
    - unsigned int word_offset;
    - unsigned long word_mask;
    - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0);
    + unsigned int offset;
    + unsigned long gpio_mask;
    + unsigned int port_addr;
    unsigned long port_state;

    /* clear bits array to a clean slate */
    bitmap_zero(bits, chip->ngpio);

    - /* get bits are evaluated a gpio port register at a time */
    - for (i = 0; i < ARRAY_SIZE(ports); i++) {
    - /* gpio offset in bits array */
    - bits_offset = i * gpio_reg_size;
    -
    - /* word index for bits array */
    - word_index = BIT_WORD(bits_offset);
    -
    - /* gpio offset within current word of bits array */
    - word_offset = bits_offset % BITS_PER_LONG;
    -
    - /* mask of get bits for current gpio within current word */
    - word_mask = mask[word_index] & (port_mask << word_offset);
    - if (!word_mask) {
    - /* no get bits in this port so skip to next one */
    - continue;
    - }
    -
    - /* read bits from current gpio port */
    - port_state = inb(dio48egpio->base + ports[i]);
    + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
    + port_addr = dio48egpio->base + ports[offset / 8];
    + port_state = inb(port_addr) & gpio_mask;

    - /* store acquired bits at respective bits array offset */
    - bits[word_index] |= (port_state << word_offset) & word_mask;
    + bitmap_set_value8(bits, port_state, offset);
    }

    return 0;
    @@ -252,37 +231,27 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
    unsigned long *mask, unsigned long *bits)
    {
    struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
    - unsigned int i;
    - const unsigned int gpio_reg_size = 8;
    - unsigned int port;
    - unsigned int out_port;
    + unsigned int offset;
    + unsigned long gpio_mask;
    + size_t index;
    + unsigned int port_addr;
    unsigned int bitmask;
    unsigned long flags;

    - /* set bits are evaluated a gpio register size at a time */
    - for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
    - /* no more set bits in this mask word; skip to the next word */
    - if (!mask[BIT_WORD(i)]) {
    - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
    - continue;
    - }
    + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
    + index = offset / 8;
    + port_addr = dio48egpio->base + ports[index];

    - port = i / gpio_reg_size;
    - out_port = (port > 2) ? port + 1 : port;
    - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
    + bitmask = bitmap_get_value8(bits, offset) & gpio_mask;

    raw_spin_lock_irqsave(&dio48egpio->lock, flags);

    /* update output state data and set device gpio register */
    - dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)];
    - dio48egpio->out_state[port] |= bitmask;
    - outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
    + dio48egpio->out_state[index] &= ~gpio_mask;
    + dio48egpio->out_state[index] |= bitmask;
    + outb(dio48egpio->out_state[index], port_addr);

    raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
    -
    - /* prepare for next gpio register set */
    - mask[BIT_WORD(i)] >>= gpio_reg_size;
    - bits[BIT_WORD(i)] >>= gpio_reg_size;
    }
    }

    --
    2.20.1
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