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    SubjectRe: [PATCH v2 06/12] iommu/vt-d: Add second level page table interface
    On Fri, Sep 07, 2018 at 10:47:11AM +0800, Lu Baolu wrote:
    >
    > >>+
    > >>+ intel_pasid_clear_entry(dev, pasid);
    > >>+
    > >>+ if (!ecap_coherent(iommu->ecap)) {
    > >>+ pte = intel_pasid_get_entry(dev, pasid);
    > >>+ clflush_cache_range(pte, sizeof(*pte));
    > >>+ }
    > >>+
    > >>+ pasid_based_pasid_cache_invalidation(iommu, did, pasid);
    > >>+ pasid_based_iotlb_cache_invalidation(iommu, did, pasid);
    > >>+
    > >>+ /* Device IOTLB doesn't need to be flushed in caching mode. */
    > >>+ if (!cap_caching_mode(iommu->cap))
    > >>+ pasid_based_dev_iotlb_cache_invalidation(iommu, dev,
    > >>pasid);
    > >
    > >can you elaborate, or point to any spec reference?
    > >
    >
    > In the driver, device iotlb doesn't get flushed in caching mode. I just
    > follow what have been done there.
    >
    > It also makes sense to me since only the bare metal host needs to
    > consider whether and how to flush the device iotlb.
    >

    DavidW might remember, i think the idea was to help with cost
    of virtualization, we can avoid taking 2 exits vs handling
    it directly when we do iotlb flushing instead.

    the other optimization was to only do devtlb flushing when you unmap
    since when establish not-present to present there is no need to
    flush devtlb at that point.

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