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    Subject[PATCH 4.18 088/235] drm/amd/pp: Set Max clock level to display by default
    Date
    4.18-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Rex Zhu <rex.zhu@amd.com>

    [ Upstream commit 97e8f102f5a9123d30258e196c6c1ea29cf52e83 ]

    avoid the error in dmesg:
    [drm:dm_pp_get_static_clocks]
    *ERROR* DM_PPLIB: invalid powerlevel state: 0!

    Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
    Reviewed-by: Harry Wentland <harry.wentland@amd.com>
    Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 9 +++++++--
    1 file changed, 7 insertions(+), 2 deletions(-)

    --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
    +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
    @@ -1020,7 +1020,7 @@ static int pp_get_display_power_level(vo
    static int pp_get_current_clocks(void *handle,
    struct amd_pp_clock_info *clocks)
    {
    - struct amd_pp_simple_clock_info simple_clocks;
    + struct amd_pp_simple_clock_info simple_clocks = { 0 };
    struct pp_clock_info hw_clocks;
    struct pp_hwmgr *hwmgr = handle;
    int ret = 0;
    @@ -1056,7 +1056,10 @@ static int pp_get_current_clocks(void *h
    clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
    clocks->min_engine_clock_in_sr = hw_clocks.min_eng_clk;

    - clocks->max_clocks_state = simple_clocks.level;
    + if (simple_clocks.level == 0)
    + clocks->max_clocks_state = PP_DAL_POWERLEVEL_7;
    + else
    + clocks->max_clocks_state = simple_clocks.level;

    if (0 == phm_get_current_shallow_sleep_clocks(hwmgr, &hwmgr->current_ps->hardware, &hw_clocks)) {
    clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
    @@ -1159,6 +1162,8 @@ static int pp_get_display_mode_validatio
    if (!hwmgr || !hwmgr->pm_en ||!clocks)
    return -EINVAL;

    + clocks->level = PP_DAL_POWERLEVEL_7;
    +
    mutex_lock(&hwmgr->smu_lock);

    if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))

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