lkml.org 
[lkml]   [2018]   [Sep]   [24]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v1 2/2] drm/stm: ltdc: Solve issue on pixel clock & data enable polarity
Date
Wrong flags used for set the pixel clock & data enable polarities.
Add trace for polarities of hsync, vsync, data enabled & pixel clock.

Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
---
drivers/gpu/drm/stm/ltdc.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 808d9fb..f671abc 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -517,7 +517,7 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
struct videomode vm;
u32 hsync, vsync, accum_hbp, accum_vbp, accum_act_w, accum_act_h;
u32 total_width, total_height;
- u32 val;
+ u32 val = 0;

drm_display_mode_to_videomode(mode, &vm);

@@ -538,7 +538,22 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
total_height = accum_act_h + vm.vfront_porch;

/* Configures the HS, VS, DE and PC polarities. Default Active Low */
- val = 0;
+ if (vm.flags & DISPLAY_FLAGS_HSYNC_LOW)
+ DRM_DEBUG_DRIVER("Horizontal Synchronization polarity is active low");
+ if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH)
+ DRM_DEBUG_DRIVER("Horizontal Synchronization polarity is active high");
+ if (vm.flags & DISPLAY_FLAGS_VSYNC_LOW)
+ DRM_DEBUG_DRIVER("Vertical Synchronization polarity is active low");
+ if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
+ DRM_DEBUG_DRIVER("Vertical Synchronization polarity is active high");
+ if (vm.flags & DISPLAY_FLAGS_DE_LOW)
+ DRM_DEBUG_DRIVER("Data Enable polarity is active low");
+ if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
+ DRM_DEBUG_DRIVER("Data Enable polarity is active high");
+ if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ DRM_DEBUG_DRIVER("Pixel clock polarity is active low");
+ if (vm.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
+ DRM_DEBUG_DRIVER("Pixel clock polarity is active high");

if (vm.flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
@@ -546,10 +561,10 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
if (vm.flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;

- if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
+ if (vm.flags & DISPLAY_FLAGS_DE_LOW)
val |= GCR_DEPOL;

- if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+ if (vm.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
val |= GCR_PCPOL;

reg_update_bits(ldev->regs, LTDC_GCR,
--
2.7.4
\
 
 \ /
  Last update: 2018-09-24 13:48    [W:0.091 / U:0.608 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site