Messages in this thread | | | Date | Tue, 18 Sep 2018 16:41:54 +0200 | From | Boris Brezillon <> | Subject | Re: [PATCH] mtd: spi-nor: Support controllers with limited TX FIFO size |
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On Tue, 18 Sep 2018 12:51:51 +0200 Frieder Schrempf <frieder.schrempf@exceet.de> wrote:
> I want to revive the discussion about this patch. Meanwhile we have > received confirmation from NXP, that the hardware can't handle writing > data chunks bigger than the TX buffer size, even when we use DMA to > refill the buffer [1]. > > This means, that this patch is required to get the FSL QSPI driver > working with the SPI mem framework. > > Could you please reconsider this patch?
I'm all for taking this patch, just waiting for a green light from Marek.
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