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    Subject[PATCH 4.18 192/197] x86/xen: dont write ptes directly in 32-bit PV guests
    Date
    4.18-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Juergen Gross <jgross@suse.com>

    commit f7c90c2aa4004808dff777ba6ae2c7294dd06851 upstream.

    In some cases 32-bit PAE PV guests still write PTEs directly instead of
    using hypercalls. This is especially bad when clearing a PTE as this is
    done via 32-bit writes which will produce intermediate L1TF attackable
    PTEs.

    Change the code to use hypercalls instead.

    Signed-off-by: Juergen Gross <jgross@suse.com>
    Reviewed-by: Jan Beulich <jbeulich@suse.com>
    Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/x86/xen/mmu_pv.c | 7 +++----
    1 file changed, 3 insertions(+), 4 deletions(-)

    --- a/arch/x86/xen/mmu_pv.c
    +++ b/arch/x86/xen/mmu_pv.c
    @@ -434,14 +434,13 @@ static void xen_set_pud(pud_t *ptr, pud_
    static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
    {
    trace_xen_mmu_set_pte_atomic(ptep, pte);
    - set_64bit((u64 *)ptep, native_pte_val(pte));
    + __xen_set_pte(ptep, pte);
    }

    static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
    {
    trace_xen_mmu_pte_clear(mm, addr, ptep);
    - if (!xen_batched_set_pte(ptep, native_make_pte(0)))
    - native_pte_clear(mm, addr, ptep);
    + __xen_set_pte(ptep, native_make_pte(0));
    }

    static void xen_pmd_clear(pmd_t *pmdp)
    @@ -1571,7 +1570,7 @@ static void __init xen_set_pte_init(pte_
    pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
    pte_val_ma(pte));
    #endif
    - native_set_pte(ptep, pte);
    + __xen_set_pte(ptep, pte);
    }

    /* Early in boot, while setting up the initial pagetable, assume

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