| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.18 164/197] drm/amd/display: fix type of variable | Date | Thu, 13 Sep 2018 15:31:53 +0200 |
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4.18-stable review patch. If anyone has any objections, please let me know.
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From: Gustavo A. R. Silva <gustavo@embeddedor.com>
commit fe78627d430435d22316fe39f2012ece31bf23c2 upstream.
Currently, the maximum value that *counter* can reach is 255, and code at line 150: while (counter < 1000) { implies a bigger value could be expected.
Fix this by changing the type of variable *counter* from uint8_t to uint16_t.
Addresses-Coverity-ID: 1470030 ("Operands don't affect result") Fixes: 2b6199a1d1b7 ("drm/amd/display: replace msleep with udelay in fbc path") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c @@ -143,7 +143,7 @@ static void wait_for_fbc_state_changed( struct dce110_compressor *cp110, bool enabled) { - uint8_t counter = 0; + uint16_t counter = 0; uint32_t addr = mmFBC_STATUS; uint32_t value;
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