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SubjectRe: [PATCH] ACPI/PPTT: Handle architecturally unknown cache types
Hi Brice,

On 13/09/18 06:51, Brice Goglin wrote:
> Le 12/09/2018 à 11:49, Sudeep Holla a écrit :
>>> Yes.  Without this change, we hit the lscpu error in the commit message,
>>> and get zero output about the system.  We don't even get information
>>> about the caches which are architecturally specified or how many cpus
>>> are present.  With this change, we get what we expect out of lscpu (and
>>> also lstopo) including the cache(s) which are not architecturally
>>> specified.
>> lscpu and lstopo are so broken. They just assume everything on CPU0.
>> If you hotplug them out, you start seeing issues. So reading and file
>> that doesn't exist and then bail out on other essential info though they
>> are present, hmmm ...
> Can you elaborate?
> I am not sure cpu0 is supposed to be offlineable on Linux. There's no
> "online" file in /sys/devices/system/cpu/cpu0. That's why former lstopo
> doesn't like CPU0 being hotplugged out. We are actually making that case
> work for another non-standard corner case. But offlining "cpu0" this is
> considered "normal", somebody must add that missing "online" sysfs
> attribute for "cpu0" (change

On x86 you can't normally offline CPU0, its something to do with certain
interrupts always being routed to CPU0, (oh, and hibernate).
You should be able to enable this behaviour with 'cpu0_hotplug' on the kernel
command line.

worth a look)

On arm64 at least, cpu0 is just like the others, and can be offlined.



> By the way, did anybody actually see an error with lstopo when there's
> no "type" attribute for L3? I can't reproduce any issue, we just skip
> that specific cache entirely, but everything else appears. If you guys
> want to make that "no_cache" cache appear, I'll make it a Unified cache
> unless you tell me what to show :)

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