Messages in this thread | | | Date | Mon, 10 Sep 2018 15:45:42 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH v2 3/5] irqchip: RISC-V Local Interrupt Controller Driver |
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On Mon, 10 Sep 2018, Christoph Hellwig wrote: > On Mon, Sep 10, 2018 at 03:37:31PM +0200, Thomas Gleixner wrote: > > > > Just a few weeks ago you said the contrary: > > > > > > > > http://lists.infradead.org/pipermail/linux-riscv/2018-August/000943.html > > > > > > Sigh. Yes. Now that you remind me. > > > > Just for clarification. I had the impression that Anup was trying to wire > > up more than just the timer interrupt, but that doesn't seem to be the > > case. > > He has an irqchip that is called from the RISC-V exception handler > when the interrupt flag is set in scause and then dispatches to one > of: IPI, timer, actual irqchip.
So the per cpu timer is the only per cpu interrupt and that thing is used unconditionally, right?
Thanks,
tglx
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