| Date | Mon, 10 Sep 2018 04:24:43 -0700 | From | Christoph Hellwig <> | Subject | Re: [PATCH v3 04/12] RISC-V: Disable preemption before enabling interrupts |
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On Thu, Sep 06, 2018 at 01:05:27AM -0700, Atish Patra wrote: > Currently, irq is enabled before preemption disabling happens. > If the scheduler fired right here and cpu is scheduled then it > may blow up. > > Signed-off-by: Palmer Dabbelt <palmer@sifive.com> > [Atish: Commit text and code comment formatting update] > Signed-off-by: Atish Patra <atish.patra@wdc.com>
Looks good,
Reviewed-by: Christoph Hellwig <hch@lst.de>
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