lkml.org 
[lkml]   [2018]   [Sep]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v2 16/34] ARM: tegra: colibri_t30: enable emmc ddr52 mode
Date
From: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Add mmc-ddr-1_8v property enabling eMMC DDR52 mode.

root@colibri-t30:~# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
actual clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
root@colibri-t30:~# hdparm -t /dev/mmcblk1

/dev/mmcblk1:
Timing buffered disk reads: 222 MB in 3.00 seconds = 73.92 MB/sec

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

---

Changes in v2: None

arch/arm/boot/dts/tegra30-colibri.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c5cb05f78604..95b6444a6f05 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -933,6 +933,7 @@
non-removable;
vmmc-supply = <&reg_module_3v3>; /* VCC */
vqmmc-supply = <&reg_1v8_vio>; /* VCCQ */
+ mmc-ddr-1_8v;
};

/* EHCI instance 1: USB2_DP/N -> AX88772B */
--
2.14.4
\
 
 \ /
  Last update: 2018-09-01 10:49    [W:0.213 / U:0.420 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site