Messages in this thread | | | From | Stephen Boyd <> | Subject | Re: [PATCH v7 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings | Date | Fri, 03 Aug 2018 16:46:50 -0700 |
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Quoting Taniya Das (2018-07-24 03:42:49) > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt > new file mode 100644 > index 0000000..22d4355 > --- /dev/null > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt > @@ -0,0 +1,172 @@ [...] > + > + CPU7: cpu@700 { > + device_type = "cpu"; > + compatible = "qcom,kryo385"; > + reg = <0x0 0x700>; > + enable-method = "psci"; > + next-level-cache = <&L2_700>; > + qcom,freq-domain = <&freq_domain_table1>; > + L2_700: l2-cache { > + compatible = "cache"; > + next-level-cache = <&L3_0>; > + }; > + }; > + }; > + > + qcom,cpufreq-hw { > + compatible = "qcom,cpufreq-hw"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + freq_domain_table0: freq_table0 { > + reg = <0 0x17d43000 0 0x1400>; > + }; > + > + freq_domain_table1: freq_table1 { > + reg = <0 0x17d45800 0 0x1400>; > + };
Sorry, this is just not proper DT design. The whole node should have a reg property, and it should contain two (or three if we're handling the L3 clk domain?) different offsets for the different power clusters. The problem seems to still be that we don't have a way to map the CPUs to the clk domains they're in provided by this hardware block. Making subnodes is not the solution.
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