Messages in this thread | | | Date | Wed, 29 Aug 2018 09:38:04 +0200 | From | Borislav Petkov <> | Subject | Re: [RFC PATCH] EDAC, ghes: Enable per-layer error reporting for ARM |
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On Tue, Aug 28, 2018 at 06:09:24PM +0100, James Morse wrote: > Does x86 have another source of memory-topology information it needs to > correlate smbios with?
Bah, pinpointing the DIMM on x86 is a mess. There's no reliable way to say which DIMM it is in certain cases (interleaving, mirrorring, ...) and it is all platform-dependent. So we do the layers to dump a memory location (node, memory controller, ....) so that we can at least limit the number of DIMMs the user needs to replace/try.
In an ideal world, I'd like to be able to query the SPD chips on the DIMMs and build the topology and then when an error happens to say, "error in DIMM <silkscreen>" where silkscreen is what is written on the motherboard under the DIMM socket.
But I don't see that happening any time soon...
> For arm there is nothing else describing the memory-topology, so as long as we > can correlate the smbios table and ghes:cper records through the handles, we can > get this working for all systems.
And then make sure vendors fill in the proper info in smbios. Because that's also a mess on x86.
-- Regards/Gruss, Boris.
ECO tip #101: Trim your mails when you reply. --
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