Messages in this thread | | | Date | Thu, 2 Aug 2018 14:39:23 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH 0/2] x86/intel_rdt and perf/x86: Fix lack of coordination with perf |
| |
On Tue, Jul 31, 2018 at 12:38:27PM -0700, Reinette Chatre wrote: > Dear Maintainers, > > The success of Cache Pseudo-Locking can be measured via the use of > performance events. Specifically, the number of cache hits and misses > reading a memory region after it has been pseudo-locked to cache. This > measurement is triggered via the resctrl debugfs interface. > > To ensure most accurate results the performance counters and their > configuration registers are accessed directly.
NAK on that.
| |