Messages in this thread | | | Date | Thu, 2 Aug 2018 03:05:18 -0700 | From | Christoph Hellwig <> | Subject | Re: [PATCH] RISC-V: Add the directive for alignment of stvec's value |
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On Thu, Jun 21, 2018 at 09:40:07AM +0800, Zong Li wrote: > The stvec's value must be 4 byte alignment by specification definition. > This directive avoids to stvec be set the non-alignment value by the > following code in head.S > > /* Point stvec to virtual address of intruction after satp write */ > la a0, 1f > add a0, a0, a1 > csrw stvec, a0 > > Signed-off-by: Zong Li <zong@andestech.com>
Just noticed this didn't get picked up yet, so:
Reviewed-by: Christoph Hellwig <hch@lst.de>
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