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SubjectRe: [PATCH v2 2/2] KVM: arm/arm64: Skip updating PTE entry if no change
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On 08/13/2018 10:40 AM, Punit Agrawal wrote:
> When there is contention on faulting in a particular page table entry
> at stage 2, the break-before-make requirement of the architecture can
> lead to additional refaulting due to TLB invalidation.
>
> Avoid this by skipping a page table update if the new value of the PTE
> matches the previous value.
>
> Fixes: d5d8184d35c9 ("KVM: ARM: Memory virtualization setup")
> Change-Id: I28e17daf394a4821b13c2cf8726bf72bf30434f9
> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Christoffer Dall <christoffer.dall@arm.com>
> Cc: Suzuki Poulose <suzuki.poulose@arm.com>
> Cc: stable@vger.kernel.org
> ---
> virt/kvm/arm/mmu.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> index 2ab977edc63c..d0a9dccc3793 100644
> --- a/virt/kvm/arm/mmu.c
> +++ b/virt/kvm/arm/mmu.c
> @@ -1120,6 +1120,10 @@ static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
> /* Create 2nd stage page table mapping - Level 3 */
> old_pte = *pte;
> if (pte_present(old_pte)) {
> + /* Skip page table update if there is no change */
> + if (pte_val(old_pte) == pte_val(*new_pte))
> + goto out;
> +
> kvm_set_pte(pte, __pte(0));
> kvm_tlb_flush_vmid_ipa(kvm, addr);
> } else {
> @@ -1127,6 +1131,7 @@ static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
> }
>
> kvm_set_pte(pte, *new_pte);
> +out:

Similar comments as the previous patch, either way:

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

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