Messages in this thread | | | From | Stephen Boyd <> | Subject | Re: [PATCH v10 00/10] drivers: Introduce firmware dnd clock river for ZynqMP core | Date | Thu, 26 Jul 2018 09:36:55 -0700 |
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Quoting Michal Simek (2018-07-25 02:51:14) > On 24.7.2018 20:14, Jolly Shah wrote: > >>> create mode 100644 drivers/firmware/xilinx/zynqmp-debug.h > >>> create mode 100644 drivers/firmware/xilinx/zynqmp.c create mode > >>> 100644 include/dt-bindings/clock/xlnx,zynqmp-clk.h > >>> create mode 100644 include/linux/firmware/xlnx-zynqmp.h > >>> > >> > >> It looks pretty calm over the last several series that's why when I get an answer > >> from Stephen or Mike I will take this series via my tree and arm-soc tree. > >> > >> I have applied 01-08 here > >> https://github.com/Xilinx/linux-xlnx/commits/zynqmp/soc > >> > >> Thanks, > >> Michal > > > > > > Thanks for merging the patches. > > By mistake I added “Reviewed-by: Stephen Boyd sboyd@kernel.org” for firmware bindings (Patch01). Stephen had reviewed clock bindings only. Please suggest if I should send a new version with that fix. > > I have fixed that in my branch and I have asked Shephen to look at clk > over chat. >
I have some unresolved review comments on v9. I'll give reviewed-by when that discussion is resolved.
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