Messages in this thread | | | Subject | Re: [PATCH v2 1/4] x86/split_lock: Enumerate #AC exception for split locked access feature | From | Dave Hansen <> | Date | Tue, 10 Jul 2018 11:54:29 -0700 |
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On 07/10/2018 11:45 AM, Fenghua Yu wrote: > On Wed, Jul 04, 2018 at 05:07:42PM -0300, Eduardo Habkost wrote: >> On Fri, Jun 29, 2018 at 06:23:35PM +0200, Thomas Gleixner wrote: >>> On Fri, 29 Jun 2018, Dave Hansen wrote: >>>> Is this MSR not really model-specific? Is it OK to go poking at it on >>>> all x86 variants? Or, do we at _least_ need a check for Intel cpus in here? >>> >>> That definitely needs a vendor check. Also the whole code needs to be >>> compiled out if CONFIG_INTEL=n. >>> >>> Aside of that this wants to be enumerated. CPUID or MISC_FEATURES and not >>> this guess work detection logic. Why do I have to ask for that for every >>> other new feature thingy? >> >> Yes, please. KVM hosts normally expect guests to not touch MSRs >> unless we explicitly tell them the MSR is available (normally >> through CPUID). This is important to ensure live migration >> between different host kernel versions works reliably. > > The problem is the hardware design for the feature is complete. The > hardware designer cannot change the feature enumeration to CPUID or > MISC_FEATURES.
Let's be honest, though. That's not *hardware* design; that is a microcode update. We've seen what microcode updates can do _very_ clearly with all the security issues. We (Intel) can surely fix this if sufficiently motivated. No?
> There is no enumeration and no flag in /proc/cpuinfo flag for the feature.
Huh? /proc/cpuinfo has tons on non-CPUID-instruction-based features. There's a retpoline one and a PTI one for goodness sake.
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