Messages in this thread | | | Date | Wed, 6 Jun 2018 14:05:39 +0200 | From | Andrea Parri <> | Subject | Re: [PATCH V5] powercap/drivers/idle_injection: Add an idle injection framework |
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Hi Daniel, Viresh,
On Wed, Jun 06, 2018 at 04:15:28PM +0530, Viresh Kumar wrote: > On 06-06-18, 12:22, Daniel Lezcano wrote: > > (mb() are done in the atomic operations AFAICT).
To do my bit, not all atomic ops do/imply memory barriers; e.g.,
[from Documentation/atomic_t.txt]
- non-RMW operations [e.g., atomic_set()] are unordered
- RMW operations that have no return value [e.g., atomic_inc()] are unordered
> > AFAIU, it is required to make sure the operations are seen in a particular order > on another CPU and the compiler doesn't reorganize code to optimize it. > > For example, in our case what if the compiler reorganizes the atomic-set > operation after wakeup-process ? But maybe that wouldn't happen across function > calls and we should be safe then.
IIUC, wake_up_process() implies a full memory barrier and a compiler barrier, due to:
raw_spin_lock_irqsave(&p->pi_lock, flags); smp_mb__after_spinlock();
The pattern under discussion isn't clear to me, but if you'll end up relying on this "implicit" barrier I'd suggest documenting it with a comment.
Andrea
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