Messages in this thread | | | From | Andy Shevchenko <> | Date | Fri, 1 Jun 2018 11:25:03 +0300 | Subject | Re: [PATCH V2] platform/x86: intel_pmc_core: Add CNP SLPS0 debug registers |
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On Fri, Jun 1, 2018 at 2:04 AM, David E. Box <david.e.box@linux.intel.com> wrote: > On Thu, 2018-05-31 at 21:38 +0300, Andy Shevchenko wrote: >> On Fri, May 25, 2018 at 4:10 AM, David E. Box >> <david.e.box@linux.intel.com> wrote:
>> > +struct slps0_dbg_map { >> > + const struct pmc_bit_map *slps0_dbg_sts; >> > + int size; >> > +}; >> >> Didn't pay attention to this earlier. Why do we have a separate size >> member? What does it define? > > It holds the size of the pmc_bit_map array, assigned as shown here: > > +static const struct slps0_dbg_map cnp_slps0_dbg_maps[] = { > + {cnp_slps0_dbg0_map, ARRAY_SIZE(cnp_slps0_dbg0_map)}, > + {cnp_slps0_dbg1_map, ARRAY_SIZE(cnp_slps0_dbg1_map)}, > + {cnp_slps0_dbg2_map, ARRAY_SIZE(cnp_slps0_dbg2_map)}, > +};
I see. Please drop this and use a terminator instead like it's done for the rest map tables.
-- With Best Regards, Andy Shevchenko
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