Messages in this thread | | | Subject | Re: [PATCH v3 1/2] xen/PVH: Set up GS segment for stack canary | From | Boris Ostrovsky <> | Date | Thu, 17 May 2018 13:47:12 -0400 |
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On 05/17/2018 11:02 AM, Jan Beulich wrote: >>>> On 17.05.18 at 16:47, <boris.ostrovsky@oracle.com> wrote: >> @@ -64,6 +67,9 @@ ENTRY(pvh_start_xen) >> mov %eax,%es >> mov %eax,%ss >> >> + mov $PVH_CANARY_SEL,%eax >> + mov %eax,%gs > I doubt this is needed for 64-bit (you could equally well load zero or leave > in place what's there in that case),
I don't understand this.
> and loading the selector before setting > the base address in the descriptor won't have the intended effect.
I wasn't sure about this either but then I noticed that secondary_startup_64() does it in the same order (although not using the MSR).
> >> @@ -150,9 +170,12 @@ gdt_start: >> .quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* __KERNEL_CS */ >> #endif >> .quad GDT_ENTRY(0xc092, 0, 0xfffff) /* __KERNEL_DS */ >> + .quad GDT_ENTRY(0x4090, 0, 0x18) /* PVH_CANARY_SEL */ >> gdt_end: >> >> - .balign 4 >> + .balign 16 >> +canary: >> + .fill 24, 1, 0 > This is too little space for 64-bit afaict (the canary lives at offset 40 there > if I can trust asm/processor.h).
Yes, should be 48. I didn't realize the two modes use different offsets.
-boris
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