Messages in this thread | | | From | Linus Walleij <> | Date | Wed, 16 May 2018 14:23:23 +0200 | Subject | Re: [PATCH v2] pinctrl: tegra20: Provide CDEV1/2 clock muxes |
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On Fri, May 4, 2018 at 12:55 AM, Dmitry Osipenko <digetx@gmail.com> wrote:
> Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks. > Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so > that main clk-controller driver could get an actual parent clock for the > CDEV1/2 clocks. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com> > Tested-by: Marcel Ziswiler <marcel@ziswiler.com> > Tested-by: Marc Dietrich <marvin24@gmx.de> > Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> > --- > > v2: This patch is factored out from the v1 clk/DT series so that it could be > applied separately.
Patch applied unless Stephen W protests. Please include swarren on future patches to this driver.
Yours, Linus Walleij
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