Messages in this thread | | | From | Joel Fernandes <> | Date | Tue, 01 May 2018 18:18:44 +0000 | Subject | Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3 |
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> > On 29/04/18 07:37, Joel Fernandes wrote: > > > On Wed, Jan 17, 2018 at 4:10 AM, Julien Thierry < julien.thierry@arm.com> wrote: > > > > Hi, > > > > > > > > On 17/01/18 11:54, Julien Thierry wrote: > > > > > > > > > > This series is a continuation of the work started by Daniel [1]. The goal > > > > > is to use GICv3 interrupt priorities to simulate an NMI. > > > > > > > > > > > > > > > > > I have submitted a separate series making use of this feature for the ARM > > > > PMUv3 interrupt [1]. > > > > > > I guess the hard lockup detector using NMI could be a nice next step > > > to see how well it works with lock up detection. That's the main > > > usecase for my interest. However, perf profiling is also a strong one. > > > > > > > From my understanding, Linux's hardlockup detector already uses the ARM PMU > > interrupt to check whether some task is stuck. I haven't looked at the > > details of the implementation yet, but in theory having the PMU interrupt as > > NMI should make the hard lockup detector use the NMI. > > > > When I do the v3, I'll have a look at this to check whether the hardlockup > > detector works fine when using NMI.
> That's what I saw on arch/arm (with some of the much older FIQ work).
> Once you have PMU and the appropriate config to *admit* to supporting > hard lockup then it will "just work" and be setup automatically during > kernel boot.
> Actually the problem then becomes that if you want to use the PMU > for anything else then you may end up having to disable the hard > lockup detector.
This problem is not anything pseudo-NMI specific though right? Contention/constraints on PMU resources should be a problem even on platforms with real NMI.
thanks,
- Joel
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