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    SubjectRe: [PATCH 3/8] bindings: PCI: designware: Add support for the EP in designware driver
    On Wed, Mar 28, 2018 at 12:38:33PM +0100, Gustavo Pimentel wrote:
    > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    > ---
    > Documentation/devicetree/bindings/pci/designware-pcie.txt | 13 +++++++++++++
    > 1 file changed, 13 insertions(+)
    >
    > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
    > index 6300762..4bb2e08 100644
    > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
    > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
    > @@ -3,6 +3,7 @@
    > Required properties:
    > - compatible:
    > "snps,dw-pcie" for RC mode;
    > + "snps,dw-pcie-ep" for EP mode;
    > - reg: Should contain the configuration address space.
    > - reg-names: Must be "config" for the PCIe configuration space.
    > (The old way of getting the configuration address space from "ranges"
    > @@ -56,3 +57,15 @@ Example configuration:
    > #interrupt-cells = <1>;
    > num-lanes = <1>;
    > };
    > +or
    > + pcie_ep: pcie_ep@dfc00000 {

    pcie-ep@...

    Or what others have used. We should define a standard name in the DT
    spec for this.

    > + compatible = "snps,dw-pcie-ep";
    > + reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
    > + <0xdfc01000 0x0001000>, /* IP registers 2 */
    > + <0xd0000000 0x2000000>; /* Configuration space */
    > + reg-names = "dbi", "dbi2", "addr_space";
    > + device_type = "pci";
    > + num-ib-windows = <6>;
    > + num-ob-windows = <2>;
    > + num-lanes = <1>;
    > + };
    > --
    > 2.7.4
    >
    >

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