Messages in this thread |  | | Subject | Re: [PATCH 3/3] clk: qcom: gdsc: Add support to poll CFG register to check GDSC state | From | Taniya Das <> | Date | Mon, 9 Apr 2018 14:11:42 +0530 |
| |
Hello Stephen,
Thanks for the review comments.
On 4/6/2018 10:10 PM, Stephen Boyd wrote: > Quoting Taniya Das (2018-04-02 03:45:45) >> diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c >> index e89584e..e0c83ba 100644 >> --- a/drivers/clk/qcom/gdsc.c >> +++ b/drivers/clk/qcom/gdsc.c >> @@ -83,6 +88,38 @@ static int gdsc_poll_status(struct gdsc *sc, unsigned int reg, bool en) >> return -ETIMEDOUT; >> } >> >> +static int gdsc_is_enabled_by_poll_cfg_reg(struct gdsc *sc, bool en) >> +{ >> + u32 val; >> + int ret; >> + >> + ret = regmap_read(sc->regmap, sc->gdscr + CFG_GDSCR_OFFSET, &val); >> + if (ret) >> + return ret; >> + >> + if (en) >> + return !!(val & GDSC_POWER_UP_COMPLETE); >> + else >> + return !(val & GDSC_POWER_DOWN_COMPLETE); > > Make this into > > if (en) > return ... > > return ... >
Will fix this in the next series.
>> +} >> + >> +static int gdsc_poll_cfg_status(struct gdsc *sc, bool en) >> +{ >> + ktime_t start = ktime_get(); >> + ktime_t timeout = >> + (sc->flags & GDS_TIMEOUT) ? TIMEOUT_US_GDS : TIMEOUT_US; >> + >> + do { >> + if (gdsc_is_enabled_by_poll_cfg_reg(sc, en) == en) >> + return 0; >> + } while (ktime_us_delta(ktime_get(), start) < timeout); >> + >> + if (gdsc_is_enabled_by_poll_cfg_reg(sc, en) == en) >> + return 0; >> + >> + return -ETIMEDOUT; >> +} >> + >> static int gdsc_toggle_logic(struct gdsc *sc, bool en) >> { >> int ret; >> @@ -106,6 +143,9 @@ static int gdsc_toggle_logic(struct gdsc *sc, bool en) >> return 0; >> } >> >> + if (sc->flags & POLL_CFG_GDSCR) >> + return gdsc_poll_cfg_status(sc, en); >> + >> if (sc->gds_hw_ctrl) { >> status_reg = sc->gds_hw_ctrl; >> /* >> @@ -258,8 +298,12 @@ static int gdsc_disable(struct generic_pm_domain *domain) >> */ >> udelay(1); >> >> - reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr; >> - ret = gdsc_poll_status(sc, reg, true); >> + if (sc->flags & POLL_CFG_GDSCR) { >> + ret = gdsc_poll_cfg_status(sc, true); >> + } else { >> + reg = sc->gds_hw_ctrl ? sc->gds_hw_ctrl : sc->gdscr; >> + ret = gdsc_poll_status(sc, reg, true); >> + } > > Maybe this can be pushed into the gdsc_poll_status() function so that > we can keep the "how do we poll status bit" logic in one place. >
Yes, I will push the logic in the gdsc_poll_status() in the next series.
>> if (ret) >> return ret; >> }
-- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation.
--
|  |