| From | Sasha Levin <> | Subject | [PATCH AUTOSEL for 4.4 052/162] mmc: sdhci-esdhc: Add SDHCI_QUIRK_32BIT_DMA_ADDR | Date | Mon, 9 Apr 2018 00:28:19 +0000 |
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From: Benoît Thébaudeau <benoit@wsystem.com>
[ Upstream commit cbb4509374963bea440c15ff26e2501d15e7927a ]
The eSDHC can only DMA from 32-bit-aligned addresses.
This fixes the following test cases of mmc_test: 11: Badly aligned write 12: Badly aligned read 13: Badly aligned multi-block write 14: Badly aligned multi-block read
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> --- drivers/mmc/host/sdhci-esdhc.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index de132e281753..3d6a005ad896 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -19,6 +19,7 @@ */ #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ + SDHCI_QUIRK_32BIT_DMA_ADDR | \ SDHCI_QUIRK_NO_BUSY_IRQ | \ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \ SDHCI_QUIRK_PIO_NEEDS_DELAY | \ -- 2.15.1 |