Messages in this thread |  | | Subject | Re: [PATCH 1/2] x86/amd_nb: Add support for Raven Ridge CPUs | From | Guenter Roeck <> | Date | Sun, 29 Apr 2018 11:24:29 -0700 |
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On 04/29/2018 10:53 AM, Borislav Petkov wrote: > On Sat, Apr 28, 2018 at 06:54:38PM -0700, Guenter Roeck wrote: >> Add Raven Ridge root bridge and data fabric PCI IDs. >> This is required for amd_pci_dev_to_node_id() and amd_smn_read(). >> >> Signed-off-by: Guenter Roeck <linux@roeck-us.net> >> --- >> This patch is a prerequisite for the second patch in the series. >> I'll be happy to apply both patches through hwmon if that is acceptable >> (and Cc: stable for 4.16+). If not, I'll be happy to wait for this patch >> to be available upstream. >> >> Since that there is no public documentation available for Raven Ridge, >> PCI IDs are derived from output of lspci. >> >> arch/x86/kernel/amd_nb.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c >> index c88e0b127810..bd33613ecb7c 100644 >> --- a/arch/x86/kernel/amd_nb.c >> +++ b/arch/x86/kernel/amd_nb.c >> @@ -14,8 +14,11 @@ >> #include <asm/amd_nb.h> >> >> #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450 >> +#define PCI_DEVICE_ID_AMD_17H_RR_ROOT 0x15d0 > > I think the nomenclature we decided upon at the time was > > ...AMD_<family>H_M<model>H... > > PCI_DEVICE_ID_AMD_15H_M10H_F3, for example. > > And in this case, it should be > > PCI_DEVICE_ID_AMD_17H_M<which model is RV>H_F<PCI function number> >
Makes sense.
> Yazen, which is the first model of Raven Ridge? >
2400G is model 17 (0x11). I was unable to find information if there are other chips/models using the same set of PCI IDs.
I'll wait for additional feedback before resending.
Thanks, Guenter
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