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    SubjectRE: [RFC 10/10] tools: PCI: Add MSI-X support
    Date
    Hi Gustavo,

    On 10 April 2018 18:15, Gustavo Pimentel wrote:
    > Adds MSI-X support to the pcitest tool and modified the pcitest.sh script to
    > accomodate this new type of interruption test.
    >
    > Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    > ---
    > include/uapi/linux/pcitest.h | 1 +
    > tools/pci/pcitest.c | 18 +++++++++++++++++-
    > tools/pci/pcitest.sh | 25 +++++++++++++++++++++++++
    > 3 files changed, 43 insertions(+), 1 deletion(-)
    I found some possible problems when testing with the Cadence EP driver. The problem
    is that pcitest uses the BARs for tests, but we also use one for the MSI-X tables

    In Cadence core the MSI-X table is in BAR0 by default, but this is configured to a size
    of 0x80 in the test driver, since it is used as the test_reg_bar. So, I changed the
    configuration to use BAR4 instead, which is configured to a size of 131072
    in pci-efp-test.c, and this gives me enough space.

    However, if I run the BAR tests in pcitest before running the MSI-X tests, the
    MSI-X tests fail, since the BAR content is overwritten. It's not a problem with the
    scenario in pcitest.sh, but it would be if the module wasn't re-loaded.

    So, wondering if we need to come up with some mechanism to specify that a specific
    BAR will be used for MSI-X, and that its size and content shouldn't be modified by
    pcitest?

    Regards,
    Alan

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